Reconciling Safety and Security in Avionics Platforms with Next-Generation Multi-Core Processors

Purpose and goal

The project is a continuation of the PhD research for the industrial PhD student Andreas Wrisley with the goal for Wrisley to finish the PhD. The overall research goal of this proposal is to take a step towards trustworthy computing infrastructures that are both functionally safe and security hardened. The use of COTS multicore hardware brings higher variability in terms of timing and energy consumption, but can also affect the system in terms of new security vulnerabilities.

Expected effects and result

The project will result in two scientific publications evaluating identified side channels for the chosen RISC-V-based platforms and propose both software-based and hardware-based mitigations enabling a more safe and secure system. The publications will be part of the PhD thesis. Another result is an evaluation of the requirements identified during the project by applying them on Saab-developed RTOS.

Planned approach and implementation

A project manager from Saab leads the project with LiU and KTH as research leaders. One industrial PhD student will carry out most of the research with support from LiU and KTH. Saab will contribute with industrial expertise within relevant areas. The project is divided into several work packages, where system requirements are identified, side channels and mitigations are evaluated and documented in scientific publications. The deliverables will constitute part of the PhD thesis.